In EP 1 017 093 A1, a method for manufacturing an IGBT having an emitter side 14 and a collector side 16 is described. On the collector side 16 of a wafer an n doped layer is created by diffusion. On the emitter side 14, a p-base layer 4, n source regions 5 and a gate electrode 6 are then created. Afterwards an emitter electrode 82 is applied. The thickness of the wafer is reduced on the collector side 16 so that a tail section of the n doped layer remains as a buffer layer 3. Finally a p collector layer 75 and a collector electrode 92 are applied. By such a method an IGBT is created which has a lowly doped buffer layer 3. Such devices are, therefore, called soft punch-through devices. However, as the n layer from which the buffer layer is made, has to be cut within the rising doping profile as shown by the dashed line in FIG. 2, it is difficult to cut the wafer accurately. A cut at a wrong depth can lead to a device, in which the punch-through properties of the IGBT cannot be guaranteed any more, if the doping concentration is too low, or the buffer layer can be made thicker than electrically necessary to assure the punch-through properties. However, a thicker buffer layer creates higher losses and variations in bipolar gain. Furthermore, the device has non-uniform current.
Such a known method can be used for devices with blocking voltages up to around 2000 V, because such devices are relatively thin. It would be difficult if such devices were manufactured directly on a thin wafer, because working directly on thin wafers can be a rather complex process, if the wafer is thin in low voltage IGBTs for forming the frontside layers including the emitter MOS cells and termination and the backside layers including the anode and buffer regions. However, even with the implementation of the described method above, such devices need optimization for improved static and dynamic performance with a number of limiting process options.
Similar challenges are met when designing fast recovery diodes based on thin wafer processing. In addition, the larger the wafer diameter, the more the difficulties encountered for thin wafer processing. Finally, the quality and availability of silicon substrate material is also an issue for thin wafer technologies utilizing for example deep diffused methods, for example, for larger wafer diameters above 200 mm.
EP 0 749 166 A1 shows a diode which is created providing a highly doped wafer, and successively epitaxially growing layers each with constant doping concentration, but in the series with decreasing doping concentration to form intermediate buffer layer. The buffer layer includes thus a first part of constant doping concentration and another part of decreasing doping concentration. A drift layer is also grown also with a plurality of layers of decreasing doping concentration. The p doped anode layer is a diffused layer. As a diode is manufactured in EP 0 749 166 A1, no sophisticated structure is needed on the cathode (emitter) side like in a design of an IGBT.
The method applied in EP 0 749 166 A1 can be complicated, time consuming and expensive due to the necessity of growing a plurality of epitaxial layers and even more complicated due to the growing the subsequent epitaxial layers with decreasing doping concentration and ending in a device with a thick buffer layer due to a thick highly doped wafer being used as a basis for the manufacturing.